As the semiconductor industry has progressed into nanometer technology process nodes in pursuit of higher device density, higher performance, and lower costs, challenges from both fabrication and design have resulted in the development of three dimensional designs, such as nonplanar multigate transistors, gate-all-around field-effect transistors (GAA FET), and fin-like field effect transistors (FinFETs). As an example, a typical FinFET is fabricated with a thin “fin” (or fin structure) extending from a substrate, for example, etched into a silicon layer of the substrate. The channel of the FinFET is formed in the vertical fin. A gate is provided over (e.g., wrapping) the fin. It is beneficial to have a gate on both sides of the channel allowing gate control of the channel from both sides. Research and development has explored not only materials of fin but also shape of fin for better device performance including higher carrier mobility and better quality of interface between the material of fin. Although existing FinFETs and methods for fabricating FinFETs have been generally adequate for their intended purposes, they have not been entirely satisfactory in all respects.